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Teljesítménymérők, analizátorok
CPLD/FPGA DIGITAL CIRCUITS DEVELOPMENT SYSTEM, TYPE: CIC-310
CIC-310

 

FUNCTIONAL EXPLANATION OF DOWNLOAD BOARD

  • ISP multi-circuits architecture and repeated burning: With serial SCI and IIC SEEPROM, we adopt ISP to burn multi-circuits architecture on board directly, and did not spend any money to buy burning device.
  • The CPLD has included more than (6,000/10,000) gate count, and its interior circuits use the SRAM cells architecture. Therefore its speed has reached several hundred MHz, and can arbitrarily program to change the circuits.
  • Have the data compression and decompression function, and can repeat to burn above ten thousand. times, and can store a number circuits architecture at the same time in SEEPROM, depend on your circuits size.
  • The connecting pins of CPLD/FPGA chip could arbitrarily set, and the input/output port need not use the single wire to be connected for signal output in order to avoid the experimental mistake to destroy the main board.
  • Adopt three 40 PIN socket with ejector latches to be connected with digital circuits experiment board.
  • Could replace the download board according to user requirement: Altera® (EPF-8000/10 K)
  • Could use RS-232 ports to download and burn the circuits configure.
  • 84 pin download board has 64 KB memory, and could expand to 256 KB memory

CONTENTS OF EXPERIMENTS

  1. The development design of combinational logic circuits
  2. The development design of the flip-flop
  3. The development design and application of counter
  4. The development design and application of arithmetic circuits and ALU
  5. The development design and application of shift registers
  6. The development design and application of frequency synthesizes and multiplier
  7. The development design and application of the encoder and decoder
  8. Experiment of LED 5x7 dot matrix display
  9. Experiment of 4x4 keypad of matrixes
  10. Experiment of Alpha-Numeric LED display

 

Katalógus letöltés (pdf)

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